Response Electronics CL6011B Specifikace Strana 270

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5Ć8 Configuration Tips
Original Ć June 1990CE4.2:CL6211
Note
Whenever performing this type of split function
operation with registers it is especially important to
document the use of each register DDP for operations
and maintenance personnel.
5.4 Tunable Discrete I/O Logic
Often, during implementation of control strategies which use discrete I/O,
it is necessary to invert the logic the discrete input or output is using to
match field equipment. Although it is possible to modify the
configuration, changing FST instructions to invert the logic, the inversion
may be accomplished via a tuning parameter. Consider the following
FST code segments:
DI(1), {Read Discrete Input}
XOR( DI1_NOT ), {Tune Discrete Logic}
or
XOR( DO1_NOT ), {Tune Discrete Logic}
DO(1), {Output logic}
As demonstrated in the truth table below, when the register is set to a
logic 0, the SVD passes unchanged. If the register is set to a logic 1, the
discrete logic is inverted. The register used should be a reference
register with initial value enabled, and the discrete portion set to the
desired value. The discrete portion of the register should be included in
a register DDP list to make the discrete logic tunable.
Register
Value
XOR SVD
Input
XOR SVD
Output
0
0
1
1
0
1
0
1
0
1
1
0
Logic Normal
Logic Inverted
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